1. Field of the Invention
The present invention relates to a process of producing a multilayer circuit board.
2. Description of the Related Art
A multilayer circuit board is conventionally produced by a build-up process as shown in FIGS. 1(a) to 1(e).
FIG. 1(a) shows a circuit board 10 which serves as a starting material for producing a multilayer circuit board and has conductor wiring patterns 14a on both sides thereof and a throughhole 12 extending therethrough to provide electrical connection between the conductor wiring patterns 14a on both sides.
FIG. 1(b) shows a first insulating layer 16a formed by coating a polyimide or other insulating resin on the surface of the circuit board 10.
FIG. 1(c) shows a viahole 18 formed through the first insulating layer 16a to enable forming a via which provides electrical connection between the conductor wiring pattern 14a on the surface of the circuit board 10 and another conductor wiring pattern which will be formed on the surface of the first insulating layer 16a. The viahole 18 can be formed by irradiating a laser beam onto the insulating layer 16a. 
FIG. 1(d) shows a conductor layer defining a conductor wiring pattern 14b formed on the surface of the insulating layer 16a and a via 20 formed on the side wall and the bottom of the viahole 18, the via 20 electrically connecting the conductor wiring pattern 14a on the surface of the circuit board 10 to another conductor wiring pattern 14b on the surface of the insulating layer 16a. 
The via 20 and the conductor wiring pattern 14b can be formed by sequentially subjecting the structure shown in FIG. 1(c) to electroless and electrolytic copper plating treatments in that order to form a plated layer (conductor layer) on the surface of the insulating layer 16a and on the side wall of the viahole 18, and then partially removing the conductor layer by etching except for the portions corresponding to the via 20 and the conductor wiring pattern 14b, respectively.
FIG. 1(e) shows a second insulating layer 16b which is formed on the first insulating layer 16a and has a via 20 extending therethrough and a conductor wiring pattern 14c formed thereon the via 20 electrically connecting the conductor wiring pattern 14c on the second insulating layer 16b to the conductor wiring pattern 14b on the first insulating layer 16a. 
The second insulating layer 16b is formed by coating an insulating resin on the first insulating layer 16a. After forming a viahole 18 through the second insulating layer 16b, electroless and electrolytic copper plating treatments are sequentially carried out, in that order, to form a conductor layer lying over the surface of the second insulating layer 16b and the side wall and the bottom of the viahole 18. Thereafter, the conductor layer is partially removed by etching except for the portions corresponding to the via 20 and the conductor wiring pattern 14c. 
The build-up process has been conventionally used to form multiple layers of conductor wiring patterns of a multilayer circuit board but has the following problems when used in producing semiconductor devices having a high density wiring for advanced integration.
A via 20 cannot be formed directly on another via 20, because vias 20 have the shape of a cup, formed of a plated metal coating on the side wall and the bottom of a viahole 18, with the core of the viahole 18 being left as a vacant space, on which a via 20 cannot be formed. The via 20 must be located at a shifted position with respect to a via 20 in the underlying insulating layer. Thus, positions of vias in the adjoining insulating layers must be shifted with respect to each other. This requirement for the shifted via positioning causes limitation to improvement in the wiring density.
Although the wiring density could be improved by reducing the diameter of the viahole 18, a reduced viahole diameter would prevent successful plating of the viahole and prevent completion of a via which would provide good electrical connection. This is because, during electrolytic plating, an electric field is concentrated at the orifice having a sharp corner and a thick deposition of a plated metal is formed around the orifice to prevent sufficient deposition on the inner surface of the viahole. FIG. 1(c) shows a viahole 18 tapered with an enlarged orifice to facilitate deposition on the inner surface of the viahole.
The object of the present invention is to solve the problems of the prior art and to provide a process of producing a multilayer circuit board which enables vias to be arranged at an improved density and ensures good electrical connection between conductor wiring patterns in the adjoining insulating layers.
To achieve the object according to the present invention, there is provided a process of producing a multilayer circuit board having multiple layers of conductor wiring patterns with insulating layers intervening therebetween, the insulating layers having vias extending therethrough to provide electrical connection between the conductor wiring patterns, the process comprising the steps of:
providing a circuit board having a conductor wiring pattern formed on one side thereof;
forming an insulating layer covering the conductor wiring pattern and said one side of the circuit board;
forming a viahole extending through the insulating layer to the conductor wiring pattern, the viahole having a bottom defined by an exposed portion of the conductor wiring pattern;
forming a recess in the insulating layer, the recess extending from an orifice of the viahole in the same pattern as another conductor wiring pattern which will be formed on the insulating layer;
forming a conductor layer covering the insulating layer and filling the viahole and the recess; and
abrasive-working the plated metal layer until the insulating layer is exposed so that portions of the plated metal that fill the viahole and the recess remain unremoved and have top surfaces flush with a top surface of the insulating layer.
The viahole advantageously has a diameter increasing stepwise from the bottom to the orifice to ensure successful filling of the vias with a conductor metal.
The viahole and the recess are advantageously formed by irradiation of a laser beam onto the insulating layer to facilitate precise forming of the vias and the recesses.
The conductor layer typically consists of a plated metal.